As the semiconductor memory device becomes more highly integrated, to decrease the contact area is a possibility to contribute to the high integrated circuits. SAC (Self-Align Contact) method is one example. To shrink the area occupied by a capacitor of a DRAM storage cell is another possibility, however it will cause the capacitance reduce of the capacitor. Owing to the leakage current, it is necessary to refresh the capacitor continuously in order to keep the stored state, especially when the capacitance of the capacitor is limited. Furthermore, the area reduction of the capacitor occupied will cause the capacitor to be disturbed by the alpha particle more easily.
Until now, there has been much effort directed to keep a relatively large capacitance of the capacitors in order to achieve a high signal to noise ratio in reading the memory cell and to reduce soft errors (due to alpha particle interference) as the memory device becomes highly integrated. As the followings, there are some approaches to increase the storage capability of the capacitor while the area occupied by the capacitor maintains small enough. (1) substituting a high capacitance material for traditional material to increase the storage charges per unit area of the capacitor, for example: the substitution the of Ta.sub.2 O.sub.5 and TiO.sub.2 for SiO.sub.2. (2) decreasing the dielectric layer thickness of the capacitor: because of the Fowler-Nordheimn tunneling effect, the dielectric layer thickness is limited to a minimum value and one can not improve the capacitor too much by this method. (3) variation the shape of the capacitor electrodes: the capacitor may have protrusions, cavities, etc., to increase the surface area of the capacitor electrode. (4) increasing the contact area between the conductive layer acting as the electrode of the capacitor and the dielectric layer: the surface between the dielectric layer and the conductive layer can be varied to a ragged type surface and not be even a plain surface anymore.
One type of increasing the contact area is a ragged polysilicon layer or hemispherical grain (HSG) polysilicon. The present invention concerns the issue of increasing the capacitance in self-align contact (SAC) structure, which utilize the aforementioned third and fourth approach.